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Re: [802.3_100GNGOPTX] -- FEC concerns for SR4, PSM4



Hi Vineet,

This is a very useful perspective. Thank you for sharing.

The bottom line I received from it, is that as we see data center architectures changing to a significant level of E/W traffic, applications that depend on low latency are going to be affected by our decisions in a manner that directly impacts performance.

Traditional optical concerns have not been affected significantly by latency because the optical path itself bore a significant portion of the latency, and the links were used for aggregation rather than inter-processor applications.

What would help to fully understand the impact of latency on today's interprocessor communication links would be some explanation of key application performance metrics vs the latency of a typical network path between processors.

I hope someone from this Task Force sees this opportunity and brings in presentation to better inform the rest of the group.

Regards,

Dan Dove

On 12/19/12 7:27 PM, Vineet Salunke (vineets) wrote:

Team,

 

I would like echo Jeff’s concern about market acceptance of FEC latency, for server to server (East-West) traffic in datacenters.

 

·         Majority of the traffic in the access and aggregation switches is E-W traffic, and increased latency directly affects the “response time”

seen by the applications and users.

·         For 100m fiber links, the RS-FEC latency will add more than 20% to the fiber delay, which will be a noticeable impact. (and worse for shorter links).

·         This increased latency will be noticeable when 100G SR4 / PSM4 modules are used to replace existing 40G SR4 or 100G SR10 modules.

·         Considering the industry trend and investments in lowering the latency of datacenter switches, if customers demand zero latency on PMDs,

it will promote non-standard optics (or operating modes) that disable the FEC on SR4 / PSM4 modules. (and then provide extended reach using FEC).

 

Also the assumption that FEC is already available on the host may not be true.

·         We expect 100G “optical” ports to use retimed modules, and support for CR4 passive copper cables may not be required or may be lower priority,

so the FEC is not “free” for these hosts. There will be definite cost and power increase going from CAUI-4 / VSR port to CR4 capable port.

·         The use of FEC for .3bm optics (SR4, PSM4) should be treated as additional component being added to the host design, or inside the module.

·         We need to compare the cost / power of “adding” FEC logic into VSR type ports, versus other solutions (eg: more equalization, better optics).

 

--vineet

 

From: Jeffery Maki [mailto:jmaki@xxxxxxxxxxx]
Sent: Tuesday, December 18, 2012 10:41 AM
To: STDS-802-3-100GNGOPTX@xxxxxxxxxxxxxxxxx
Subject: Re: [802.3_100GNGOPTX] SMF Ad Hoc

 

John,

 

The assumption of the use of FEC has to be explicit so all know that it must be implemented and so that they know that the latency of FEC will occur.  Is FEC really so important to the technical proposal so at to justify it?  Cost reduction of FEC would be one metric for its justification.

 

The issue then turns to market acceptance of FEC latency.  For 500 meters, one might argue 802.3bj FEC latency is not an issue.  As the reach goes down, the relative contribution of the FEC latency increases in terms of the overall link latency (time of flight of light in glass).  Please keep in mind also that absolute link latency is a market differentiating variable.  I’d like to see market acceptance of FEC latency presented as a function of reach for optical links.  (Just because the 802.3bj task force adopted an FEC with a certain amount of latency does not mean we get to stop thinking in the 802.3bm task force about our own market acceptance of FEC.)

 

Jeff

 

 

From: John Petrilla [mailto:john.petrilla@xxxxxxxxxxxxx]
Sent: Tuesday, December 18, 2012 9:44 AM
To: Jeffery Maki; STDS-802-3-100GNGOPTX@xxxxxxxxxxxxxxxxx
Subject: RE: [802.3_100GNGOPTX] SMF Ad Hoc

 

Hello Jeff

 

Unfortunately, justification of the 500m SMF objective for the project is explicitly cost, size and power.  While I can sympathize with other with other issues, I would need a lot of help explaining why cost, power or sized was sacrificed.

 

Regards,

John

 

From: Jeffery Maki [mailto:jmaki@xxxxxxxxxxx]
Sent: Tuesday, December 18, 2012 8:51 AM
To: STDS-802-3-100GNGOPTX@xxxxxxxxxxxxxxxxx
Subject: Re: [802.3_100GNGOPTX] SMF Ad Hoc

 

All,

 

We have to make sure that the assumption of the use of FEC is explicit.  Although we might argue not to count the cost of the FEC encoder/decoder itself, we do need to understand the impact on cost that the use or lack of use of FEC poses.  It is good thus to make analysis of the impact on cost of designs presuming the use of FEC versus designs presumed NOT to use FEC.  I see the potential lack of need of FEC as one of the technical advantages of parallel single mode as well as market-acceptance advantages.

 

Jeff

 

 

From: Anslow, Peter [mailto:panslow@xxxxxxxxx]
Sent: Tuesday, December 18, 2012 2:10 AM
To: STDS-802-3-100GNGOPTX@xxxxxxxxxxxxxxxxx
Subject: [802.3_100GNGOPTX] SMF Ad Hoc

 

Hi,

 

As previously announced, there is an SMF Ad Hoc meeting starting at 8:00 am Pacific today Tuesday 18 December.

I have currently received two requests for presentations, so the draft agenda is:

 

·         IEEE patent policy reminder

o   http://www.ieee802.org/3/patent.html

 

·         Approval of the draft minutes from 4 December call

 

·         Presentation

o   PSM4 Technology & Relative Cost Analysis Update                                                                           Jon Anderson, Oclaro

o   Basic Study on Receiver Bandwidth Requirement  for Discrete Multi-tone Modulation    Masato Nishihara, Fujitsu

 

·         Discussion

 

·         Future meetings (next opportunity - 8 Jan)

 

I hope to post both presentations on the SMF Ad Hoc web page  just prior to the meeting.

 

Peter Anslow from Ciena has invited you to join a meeting on the Web, using WebEx. Please join the meeting 5-10 minutes early so we may begin on time.

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Topic: "SMF Ad Hoc"

Date & Time: Tuesday, 18 December 2012 at 16:00, GMT Time (London, GMT)

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Regards,

Pete Anslow | Senior Standards Advisor
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