[802.3_4PPOE] Missing power demotion logic in PSE state machine when connected to dual-signature

[Yair Darshan <YDarshan@xxxxxxxxxxxxx>]

Hi all,

 

Please see correction to issue found for the topic above.

 

1. Change the exit from CLASS_EVAL_PRI to POWER_DENIGED_PRI from:

!ted_timer_pri_done + !ted_timer_done + (pd_req_pwr_pri > pse_avail_pwr_pri) + (!pd_4pair_cand * alt_pwrd_sec)

To:

!ted_timer_pri_done + !ted_timer_done + (pd_req_pwr_pri > pse_avail_pwr_pri) * (pse_avail_pwr_pri < 3) + 

((pd_req_pwr_pri = 0) * (pse_avail_pwr_pri < 3)) + (!pd_4pair_cand * alt_pwrd_sec)

 

2.  Change the exit from CLASS_EVAL_PRI to POWER_UP_PRI from:

ted_timer_pri_done * ted_timer_done * (pd_req_pwr_pri ≤ pse_avail_pwr_pri) * (pd_4pair_cand + !alt_pwrd_sec)

To:

ted_timer_pri_done * ted_timer_done *  ( (pd_4pair_cand + !alt_pwrd_sec) + (pd_req_pwr_pri ≠ 0) * (pd_req_pwr_pri ≤ pse_avail_pwr_pri) + (pse_avail_pwr_pri > 2) )

 

Similar remedy for secondary.

Yair

 

 

Darshan Yair

Chief R&D Engineer

Analog Mixed Signal Group

Microsemi Corporation

 

1 Hanagar St., P.O. Box 7220
Neve Ne'eman Industrial Zone
Hod Hasharon 45421, Israel
Tel:  +972-9-775-5100, EXT 210.

Cell: +972-54-4893019
Fax: +972-9-775-5111

 

E-mail: <mailto:ydarshan@xxxxxxxxxxxxx>.