Hi Lennart and all,
Please see attached my comments to your baseline attached in the file +
“short” summary of it below:
In 145.2.10.3a Reflected voltage:
You have change the word draw to source which I believe it is incorrect (I saw David Stover input too.):
PSE is not sourcing in this case. It is drawing or consuming power. A device sourcing power is a device that the current is flowing
out on its positive terminal to a load and return back to its negative. In our case the voltage coming to the PSE is EXTERNAL voltage (even if it is reflected or backfeed, it is still coming from the outside into the PSE PI), as a result, the PSE in
this case is a load and not power source.
Please change back to “draw” or equivalent.
145.3.8.8 Backfeed voltage
-The changes you made are OK but it is good for SSPDs only when you restrict the backfeed requirement to 2-pair mode.
Dual-signature PDs need dedicated text in which we require that backfeed will be met for all operating modes.
It is true that DSPDs need to show valid signature on each pairset however the proposed text as is will create confusion since offset voltage (part of valid sig requirement) is not backfeed. Backfeed voltage creates a common voltage at
the PSE (you remember Vc in our discussion) that will create the leakge issue that will pullot detection in a multiport system + will cause invalid detection by definition.
Please see proposal for modification in the file attached.
And last (this is per our discussion):
Missing addressing PSE sensitivity to leakage current generated by the backfeed common mode voltage and its low source resistance if backfeed is permitted in 3-pair:
Add the following text to :
“In a multiport system, PSE port that is doing detection should not be polluted by another PSE port at any operating modes including:
a) backfeed voltage of unpowered pair. See 45.3.8.8.
b) powered pair of adjacent port."
(or equivalent text).
Yair
From: Lennart Yseboodt [mailto:lennart.yseboodt@xxxxxxxxxxx]
Sent: Wednesday, May 2, 2018 11:04 PM
To: STDS-802-3-4PPOE@xxxxxxxxxxxxxxxxx
Subject: Re: [802.3_4PPOE] Backfeed - presentation and baseline
EXTERNAL EMAIL
Fair point. Made a couple changes:
- Used a named parameter rather than just specify 1.3mA in the text
- The current is actually coming out of the negative pins toward the PD, ergo changed the text to say 'source' rather than draw
- The PD would need to push that negative pair lower than its own negative supply for the current to increase... which would constitute 'sourcing power' and is no longer reflecting a voltage, but imposing one.
On Wed, 2018-05-02 at 19:31 +0000, Stover, David wrote:
Hey Lennart,
As always, thanks for your hard work on this. Seems like we’re converging on a solution. I’m still reviewing, but wanted to point out a concern I have regarding the ‘reflected voltage’ requirement:
“A PSE, operating in 2-pair mode shall not draw a current higher than 1.3 mA on the negative pair of the unpowered pairset.”
Taken in isolation, I believe this requirement is missing a critical qualification: applied voltage. Surely we do not want to enforce this requirement e.g. for applied voltage greater than PSE output voltage.
My proposed change:
“A PSE operating in 2-pair mode shall not sink current greater than 1.3mA on the negative pair of the unpowered pairset for any voltage applied in the range of 0 V to VPSE-OC, where VPSE-OC is the open circuit voltage of the powered
pairset.”
Notice a new term VPSE-OC, to address a concern that VPSE specifies a measurement point but does not qualify who is applying this voltage. This solution attempts to clarify that the maximum applied voltage during this test should be no
greater than the PSE output voltage.
-David
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