|Thread Links||Date Links|
|Thread Prev||Thread Next||Thread Index||Date Prev||Date Next||Date Index|
Updating some syntax errors.
Hi David and all,
I would like to make r05-18 a TFTD comment.
My response to David A proposal:
The quoted text that David showed in Page 223, line 34 states: "Powered PDs that no longer require power, and identify the PSE as Type 3 or Type 4, shall remove the current draw component and may remove the impedance components of the MPS.". certainly, helps but is not sufficient.
To remove the current draw component doesn’t mean that the current must be zero since it is not possible to have zero current.
And if this is what we can interpret from the text, this is wrong requirement and impossible to meet.
I can interpret that for a PD to ensure disconnect in my example in the comment, need to show MPS < (4mA – some margin). This will be the actual field behavior for PSEs to disconnect PDs.
In the PD side, this text reveal new problem that I was not aware of it which is somebody can interpret that PD designs must show zero DC current in order to be disconnected which is impossible to implement.
And last, the proposed response from the comment editor keep the question open regarding how PD vendor will understand that Irev need to be accounted for if Irev appears only in the PSE section without any clue or link in the PD section.
If David is right and the current should be zero than the presence of Irev will violate it since MPS now is not ZERO and PD may not be aware of the effect of Irev to MPS. Also, Irev can never set to ZERO. So, the interpretation that PD that want to remove power must remove completely the current flow can’t be really implemented so the other interpretation that DC component need to be below what is specified in the PSE section make more sense to me.
In order to save time in the discussions on Wednesday I suggest modifying the text to:
"Powered PDs that no longer require power, and identify the PSE as Type 3 or Type 4, shall remove the current draw component and may remove the impedance components of the MPS. See 145.2.12, 18.104.22.168, 22.214.171.124".
Chief R&D Engineer
Analog Mixed Signal Group
1 Hanagar St., P.O. Box 7220
To unsubscribe from the STDS-802-3-4PPOE list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=STDS-802-3-4PPOE&A=1