The following request for agenda time for a Lower cost, short reach, optical PHYs using 100 Gb/s wavelengths call for interest has been received from Mabud Choudhury. It will be discussed at the IEEE 802 LMSC November 2019 Plenary meeting in Waikoloa, HI, USA.
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Matching the module I/O rate to the ASIC I/O rate reduces component count and complexity, leading to lower cost & power optical interfaces. SerDes rates on both switch ASICs and server network interface cards are expected to move to 100 Gb/s per lane in the next few years, driving current work in the IEEE P802.3ck and P802.3cu Task Forces. However, the highest speed, shortest reach PMDs over multimode fiber under development in Ethernet are built on 50 Gb/s optical lanes. As the electrical power & interconnect bandwidth of servers & accelerators are increasing, high-radix switches are also able to connect more servers, creating a trend towards fewer servers-per-rack and thus longer server attachment connections at 100 Gb/s and higher. At the same time the achievable passive copper cable reach with 100 Gb/s lanes is expected by some experts to be shorter than the reach with 50 Gb/s lanes. In order to develop the lowest cost and complexity optical modules for next-generation server attachment, as well as shorter switch-to-switch connections, with emerging SerDes rates, we request a Call-for-Interest to assess support for a Study Group to develop the PAR and CSD for lower cost, short reach, optical PHYs using 100 Gb/s wavelengths.
The call for interest will take place during the IEEE 802.3 Opening Plenary on the morning of Monday 11th November. A call for interest consensus building meeting has been scheduled to occur from 18:30 to 19:30 on the evening of Tuesday 12th November. The vote to determine if a Study Group will be formed will take place at the IEEE 802.3 Closing Plenary on the afternoon of Thursday 14th November.
Lower cost, short reach, optical PHYs using 100 Gb/s wavelengths CFI consensus building meeting presentation