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Hello Tim, And thank you very much for your reply. Mine are
below. Please also note that I Cc-d George and Piergiorgio directly, as the reflector does not seem to work (my mail sent in the morning still has not come back). Yours sincerely
From: Tim Baggett <Tim.Baggett@xxxxxxxxxxxxx> Hello Gergely,
I agree, and added this change to the proposed resolution text file (attached).
I do not see that a minimum time is specified anywhere for recv_beacon_timer. However, yes, in an implementation the duration of this timer would need to change due account for the increase in the
beacon_timer. I cannot find anywhere that this would need to be changed in the draft however. I have not included any change in the attached proposed response text for this.
When the PLCA RS is disabled, the RS must continue to map between the PLS signaling and MII signaling. This is done in the NORMAL state, and we need to remain in the NORMAL state to continue performing the actions. An UCT would cause an
immediate transition into IDLE even when plca_status is not OK resulting on the actions in NORMAL being executed only once, right? Wouldn’t an UCT take precedence over the open-arrow global transition into NORMAL? No, it would not. “21.5.3 State transitions” says this: ==== Any open arrow (an arrow with no source block) represents a global transition. Global transitions are evaluated continuously whenever any state is evaluating its exit conditions. When
a global transition becomes true, it supersedes all other transitions, including UCT, returning control to the block pointed to by the open arrow. ==== In any event, I think it would be more clear to the reader to document the transition from NORMAL to IDLE as “plca_status = OK”. Both work, if you are in rush. I have not included this change in the proposed response text or diagram. Please consider doing so
Yes, the open-arrow global transition into DISABLE would take higher precedence over the (plca_en) and (local_nodeID ≠ 255) terms in the condition exiting from DISABLE to RESYNC. I’ve updated the attached proposed resolution text, see [15]-11,
and diagram.
Yes, the open-arrow global transition into DISABLE would take higher precedence over the (plca_en) term in the condition exiting from DISABLE to RECOVER. I’ve updated the attached proposed resolution text, see [15]-12, and diagram. Regards, Tim From: Huszak Gergely <Gergely.Huszak@xxxxxxxx>
External E-Mail
Hello Tim, Sorry for being in desync (I am in CET). Some question, if I may: recv_beacon_timer and plca_status_timer rely on the value of the beacon_timer, which is now proposed to be changed from 20 to 22BT -> would these 2 times be affected by this change? More precisely: - plca_status_timer: would this change from 130090 to 130094? - recv_beacon_timer: the change of minimum value is appropriate? If no change is expected to these, the text would need to change, as the formulae would then be off? Then some proposals (all are simplifications of things that are touched anyways for other reasons):
Yours sincerely Gergely From: Tim Baggett <Tim.Baggett@xxxxxxxxxxxxx>
Hello all, Please review the following proposed resolution to comment r02-33. The expected changes to the state diagrams are attached for your visual convenience. Regards, Tim, Piergiorgio, David ----- FULL TEXT OF THE PROPOSED RESOLUTION ----- PROPOSED ACCEPT IN PRINCIPLE. [1] In Figure 148-4, in the HOLD state, replace " TX_ER <= plca_txer TXD <= 0000 " with " TX_ER <= ENCODE_TXER(tx_cmd_sync) TXD <= ENCODE_TXD(tx_cmd_sync) " [2] In Figure 148-4, in the ABORT state, replace " TX_ER <= plca_txer TXD <= 0000 " with " TX_ER <= ENCODE_TXER(tx_cmd_sync) TXD <= ENCODE_TXD(tx_cmd_sync) " [3] In Figure 148-4, in both the COLLIDE and DELAY_PENDING states add the following: " TX_ER <= ENCODE_TXER(tx_cmd_sync) TXD <= ENCODE_TXD(tx_cmd_sync) " [4] In Figure 148-4, add a recirculating arc with an "ELSE" condition to the following state boxes: WAIT_MAC, PENDING, DELAY_PENDING, COLLIDE and ABORT. [5] In Figure 148-4, in the transition from WAIT_MAC to TRANSMIT state, change the condition from "plca_txen" to "MCD * plca_txen" [6] At page 242, line 44, change the duration of the beacon_timer from "20 bit times" to "22 bit times". [RATIONALE] this is required so that the BEACON duration is guaranteed to be always the same (20 bit times) despite the timer tolerance vs the MII TX_CLK tolerance which drives the PLCA
DATA State Diagram. [7] At page 248, line 8 remove the duplicate MCD declaration (the correct definition is at line 50 in the Abbreviations section). [8] At page 248, line 34 change "A continuous free-running timer that shall expire synchronously with the rising edge of TX_TCLK."
with "A continuous free-running timer that shall expire synchronously with the rising edge of the MII TX_CLK" [9] Add the following variable definition in 148.4.6.2: " tx_cmd_sync The value of the tx_cmd variable sampled on the rising edge of the MII TX_CLK. Values: see tx_cmd in 148.4.5.2 " [10] In Figure 148-4, replace all occurrences of "ENCODE_TXD(tx_cmd)" with "ENCODE_TXD(tx_cmd_sync)" [11] In Figure 148-4, replace all occurrences of "ENCODE_TXER(tx_cmd)" with "ENCODE_TXER(tx_cmd_sync)" [12] Change the condition on the open-ended transition to NORMAL of “Figure 148–4—PLCA Data state diagram” from “ plca_reset + (!plca_en) * (!plca_status) ” to “ (plca_status != OK) “ [13] Change the condition on the NORMAL->IDLE transition of “Figure 148–4—PLCA Data state diagram” from “ plca_en * (!plca_reset) * plca_status ” to “ (plca_status = OK) ” [14] Remove the NORMAL->NORMAL transition of “Figure 148–4—PLCA Data state diagram” with “ELSE” on it. RATIONALE: The open arrow global transition is evaluated continuously whenever any state is evaluating its exit conditions (see IEEE Std 802.3-2018 subclause 21.5.3). As a result, assuming
that the open arrow global transition reset condition that took the PLCA CONTROL state diagram into the NORMAL state still exits the PLCA CONTROL state diagram will immediately enter the NORMAL state again. This is therefore the same result as the NORMAL to
NORMAL transition based on the ELSE exit condition. [15] Update the PLCA Control state diagram as follows: 1. Within the EARLY_RECEIVE state, add the action “start beacon_det_timer”. 2. Create a transition from the EARLY_RECEIVE state to a connector, D, with the following exit condition: (local_nodeID != 0) * (!receiving) *
((rx_cmd = BEACON) + ((!CRS) * beacon_det_timer_not_done)) 3. Change the exit transition from EARLY_RECEIVE to connector B from: (local_nodeID != 0) * ((rx_cmd = BEACON) + recv_timer_done) * (!receiving) to: (local_nodeID != 0) * recv_timer_done * (!receiving) 4. Delete the transition from RESYNC to SYNCING including its exit condition. 5. Add a connector, D, with arrow to SYNCING. 6. Within the SYNCING state, add the action: IF (local_nodeID != 0) * (rx_cmd != BEACON) THEN start invalid_beacon_timer END 7. For the SYNCING exit condition to connector A, replace the condition from: rx_cmd != BEACON to: !CRS 8. Add an open arrow global transition to RESYNC with the condition “invalid_beacon_timer_done”. 9. Add an exit transition from RESYNC to new connector, E, with the condition “(local_nodeID != 0) * (CRS)” 10. Add a connector, E, with arrow to EARLY_RECEIVE. [16] In section 148.4.5.4, page 242 Line 46 (before burst_timer) add the following timers: beacon_detect timer Timer for detecting received BEACONs. Duration: 24 bit times. Tolerance: +/- 1 bit time. invalid_beacon_timer Timer used for BEACON validation. This timer is stopped any time rx_cmd = BEACON. Duration: 4000 ns Tolerance: +/- 400 ns [17] In clause 30.16.1.1.5 “aPLCATransmitOpportunityTimer”, Page 43, Line 15, Change “The default value is 24.” to “The default value is 32.” [18] Change equation 148-2 on Page 243, Line 17, from “ to_timer > 2 x max(t<propdelay>) +
max(TX_EN sampled to MDI output) +
max(MDI input to CRS asserted) +
max(MDI input to CRS deasserted) –
min(MDI input to CRS deasserted) “ to “ to_timer > 2 x max(t<propdelay>) +
max(TX_EN sampled to MDI output) +
max(MDI input to CRS asserted) +
max(MDI input to CRS deasserted) –
min(MDI input to CRS deasserted) +
max(MII propagation delay) “ [19] Delete lines 10 through 20 of page 240. This removes the text beginning with "After syncing is done ..." through "... appearing at the MDI to CRS asserted."
[20] Make changes in Table 147-6 on page 224 in the following order: 1. Remove row with Event "TX_EN sampled to CRS asserted" 2. Remove row with Event "TX_EN sampled to CRS deasserted" 3. Change all occurances of "TX_EN" to "TX_EN / TX_ER" 4. Change all occurances of "RX_DV" to "RX_DV / RX_ER" ----------- To unsubscribe from the STDS-802-3-10SPE list, click the following link:
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