PROPOSED ACCEPT IN PRINCIPLE Multiple editorial changes are required in both the PCS Receive and PCS Transmit functions subclauses to address the lack of clarity pointed out by the commenter. Throughout the whole subclause 147.3.2 (including figures) apply the following changes: - replace all occurrences of "pcs_txen" with "TX_EN" - replace all occurrences of "pcs_txer" with "TX_ER" - replace all occurrences of "pcs_txd" with "TXD" Throughout the whole subclause 147.3.3 (including figures) apply the following changes: - replace all occurrences of "pcs_rxdv" with "RX_DV" - replace all occurrences of "pcs_rxer" with "RX_ER" - replace all occurrences of "pcs_rxd" with "RXD" At page 170, line 42 replace "with every PCS transmit clock cycle" to "with every symb_timer expiration. The symb_timer is defined in 147.3.2.7." At page 177, line 33 change the description of the "tx_sym" variable to: "5B symbol to be conveyed to the PMA Transmit function by the means of the PMA_UNITDATA.request primitive specified in 147.2.2." At page 178, line 24 change the description of the "ENCODE" function to: "This function takes a 4 bit input parameter Scn<3:0> and returns a 5B symbol according to the following procedure: 1. Convert Scn<3:0> into Sdn<3:0> as specified in 147.3.2.6. 2. Convert Sdn<3:0> (4B symbol) into the corresponding 5B symbol defined in Table 147-1." At page 179, line 24 change the description of the "STD" abbreviation to: "Alias for 5B symbol timer done." At page 179, line 32, change the second paragraph (starting with "An implementation of ..." to read: "An implementation of a self-synchronizing scrambler by a linear-feedback shift register is shown in Figure 147–6. The bits stored in the shift register delay line at time n are denoted by Scrn<16:0>. The ‘+’ symbol denotes the exclusive OR logical operation. When Scn<3:0> is presented at the input of the scrambler, Sdn<3:0> is produced by shifting-in each bit of Scn<3:0> as Scn, with i ranging from 0 to 3 (i.e., LSB first). The scrambler is reset upon execution of the PCS Reset function. If the PCS Reset is executed, all bits of the 17-bit vector representing the self-synchronizing scrambler state are arbitrarily set. The initialization of the scrambler state is left to the implementer. In no case shall the scrambler state be initialized to all zeroes. At every STD, if no data is presented at the scrambler input via Scn<3:0>, the scrambler may be fed with arbitrary inputs." At page 180, line 8, append the following text to subclause 147.3.2.7: "symb_timer A continuous free-running timer. PMA_UNITDATA.request messages are issued by the PCS concurrently with symb_timer_done (see 147.2.2). Continuous timer: The condition symb_timer_done becomes true upon timer expiration. Restart time: Immediately after expiration, timer restart resets the condition symb_timer_done. Duration: 400 ns ± 100 ppm (see 22.2.2.1)" At page 179 in Figure 147-6 perform the following changes: - replace "TXDn[i]" with "Scn". Please note the 'n' is a subscript - replace all square brackets '[]' with angular brackets '<>' At page 180, line 9, change the description of the "RXn" variable to read: "The rx_sym parameter of the PMA_UNITADATA.indication primitive defined in 147.2.1. The ‘n’ subscript denotes the rx_sym conveyed in the most recent recv_symb_conv_timer cycle. The ‘n-x’ subscript indicates the rx_sym conveyed ‘x’ cycles behind the most recent one." At page 181, line 18, change the description of the "DECODE" function to read: "This function takes a 5B symbol input parameter and returns a 4 bit value Dcn<3:0> value according to the following procedure: 1. Convert the 5B input symbol into Drn<3:0> by performing a reverse lookup of Table 147-1. If no 4B value is associated to the given 5B symbol, the PCS Receive function shall assert RX_ER for at least one symbol period and Drn<3:0> may be set arbitrarily. 2. Convert Drn<3:0> to Dcn<3:0> as specified in 147.3.3.7." Please not that the 'n' in the Dcn and Drn variables name is a subscript. At page 181, line 26, change the description of the "RSCD" abbreviation to read: "Alias for recv_symb_conv_timer_done." At page 183, line 48, insert a new subclause 147.3.3.x with name "Timers" between existing subclauses 147.3.3.7 and 147.3.3.8. Add the following text to the newly created subclause: "recv_symb_conv_timer A continuous timer which expires when the PMA_UNITDATA.indication message is generated (see 147.2.1). Continuous timer: The condition recv_symb_conv_timer_done becomes true upon timer expiration. Restart time: Immediately after expiration, timer restart resets the condition recv_symb_conv_timer_done. Duration: timed by the PMA_UNITDATA.indication message generation." Perform renumbering of the subclauses accordingly. At page 183, line 28 change the whole paragraph starting with "The PCS receive function shall ..." to read: "The PCS Receive function descrambles the 5B/4B decoded data stream and returns the value of RXD<3:0> to the MII. The descrambler shall employ the polynomial defined in 147.3.2.6. The implementation of the self-synchronizing descrambler by linear-feedback shift register is shown in Figure 147–9. The bits stored in the shift register delay line at time n are denoted by Dcrn<16:0>. The ‘+’ symbol denotes the exclusive OR logical operation. When Drn<3:0> is presented at the input of the descrambler, Dcn<3:0> is produced by shifting-in each bit of Drn<3:0> as Drn, with i ranging from 0 to 3 (i.e., LSB first). The descrambler is reset upon execution of the PCS Reset function. If PCS Reset is executed, all the bits of the 17-bit vector representing the self-synchronizing descrambler state are arbitrarily set. The initialization of the descrambler state is left to the implementer. At every RSCD, if no data is presented at the descrambler input via Drn<3:0>, the descrambler may be fed with arbitrary inputs." Please not that the 'n' in the Dcn and Drn variables name is a subscript. At page 183, in figure 147-9, perform the following changes: - replace "RXDn[i]" with "DCn[i]" - replace all square brackets '[]' with angular brackets '<>' At page 191, line 52, add the followint text after "DME encoded stream received at the MDI.": "The clock recovery provides a synchronous clock for sampling the signal on the pair. While it may not drive the MII directly, the clock recovery function is the underlying root source of RX_CLK."