Re: [STDS-802-3-EPOC] Link Ad Hoc Notes

[Bill Keasler <bkeasler@xxxxxxxxxx>]

I am forwarding some rough notes on the idea of exploiting three MDIO registers to control the frequencies scanned during PLC acquisition. I am hoping to have a few minutes to discuss during the 17APR PHY Link Ad-Hoc.

Regards,

Bill K.

From: Ed (Edward) Boyd [mailto:ed.boyd@xxxxxxxxxxxx]
Sent: Monday, April 15, 2013 11:50 AM
To: STDS-802-3-EPOC@xxxxxxxxxxxxxxxxx
Subject: [STDS-802-3-EPOC] Link Ad Hoc Notes

All,

Sorry for the delay sending out the notes from last week's meeting.  The meeting was focused on the baseline proposal for the next meeting.  I have attached the slides with the working baseline.  The notes are below.  Mark; please post the slides.  We would like to see proposals on the FEC/CRC for the PLC, preamble for the PLC, hunting procedure, and TDD PLC cycle.

Thanks,
Ed...

Review baseline proposal and questions
- Nicola will have presentation for TDD PLC frame duration
- PLC cycle for FDD is clear due to alignment with pilot pattern.
- PLC cycle for TDD is not clear and needs presentation. Nicola will present in
future meeting.
- Preamble needs definition. Preamble is a single fixed pattern of lower than
QAM16. Preamble is not covered by FEC and infrequent errors in preamble will
not cause bit errors in frame.
- Differences are minor between Duane/Hesham/Ed and Marek's proposal for
instructions. To be discussed at future call.
- FEC+CRC will be considered to determine error performance of channel.


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Edward Boyd | Sr Technical Director
Broadcom Corporation | (O) 707-792-9008 | (M) 707-478-1146

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Attachment: 20130416_16APR13_1543_(Control of PLC hunt range via MDIO).pdf
Description: 20130416_16APR13_1543_(Control of PLC hunt range via MDIO).pdf