Hi Marcus,
Good catch! For 10km reach there will be
no FEC. Below is an updated proposed study list for the SMF application.
10km over SMF reach
objective Study Alternatives
”
1x technology (10G) optical interface
1. 1550nm 10x10G cooled EML DWDM array / 200GHz ITU G.694.2 grid
2. 1550nm 10x10G un-cooled DML CWDM array / 20nm ITU G.694.2 grid
”
2x technology (20G) optical interface
3. 1310nm 5x21G cooled EML DWDM array / 200GHz ITU consistent grid
4. 1310nm 5x21G un-cooled DML (or EML) CWDM array / 20nm ITU G.694.2
grid
5. 1310nm 4x26G un-cooled DML (or EML) CWDM array / 25nm IEEE LX-4
grid
”
4x technology (40G) optical interface
6. 1310nm 2x52G DQPSK / single wavelength
(All numbers rounded off to the nearest integer.)
Chris
From: Marcus Duelk [mailto:duelk@alcatel-lucent.com]
Sent: Wednesday, December 06, 2006
5:36 PM
To: Chris
Cole
Cc:
STDS-802-3-HSSG@listserv.ieee.org
Subject: Re: [HSSG]
<HSSG-FO> Fiber Optic Ad Hoc Teleconference 12/06/2006 Minutes
Chris, Dan,
thanks for the summary of today's call and the proposals. I have a question
regarding the last bullet item -- 2x56G DQPSK for single-channel intermediate
reach (2km w/o DCF, ~40km w/ DCF) at 1310nm.
Are you proposing 2x50G for a total of 100 Gb/s MAC rate, and therefore
the 2x56G was a typo ? Or is there some particular overhead (~12% ?) for
error correction ? I thought that this proposal was rather for a LAN PHY
(hence no FEC) !? If this is supposed to be with FEC then we are obviously
discussing a WAN PHY which should be rather at 1550nm than at 1310nm ...
thanks
marcus
Chris Cole wrote:
Dan,
Based on today’s call, I would like
to suggest the following update to the proposed Alternatives Study List.
10km over SMF reach
objective
1x technology (10G) optical interface alternatives
1550nm 10x10G cooled EML DWDM array / 200GHz ITU G.694.2 grid
1550nm 10x10G un-cooled DML CWDM array / 20nm ITU G.694.2 grid
2x technology (20G) optical interface alternatives
1310nm 5x21G cooled EML DWDM array / 200GHz ITU consistent grid
1310nm 5x21G un-cooled DML (or EML) CWDM array / 20nm ITU G.694.2
grid
1310nm 4x26G un-cooled DML (or EML) CWDM array / 25nm IEEE LX-4 grid
4x technology (40G) optical interface alternatives
1310nm 2x56G DQPSK / single wavelength
(SMF
interfaces use 64B/66B encoding)
100m over OM3 MMF reach
objective
850nm 12x10G VCSEL array / MPO ribbon fiber
(parallel
optics MMF interfaces use 8B/10B encoding)
Are there other specific optical
interfaces that should be added to our Alternatives Study List?
Chris
Minutes: 12/06/06
-------------------------------------
Introductions
Call for email indicating attendance
Attendees: Dan Dove, Chris
Cole, Steve Song, Greg McSorley, Larry
Green, Schelto Vandoorn,Milind Gokhale, Peter Dartnell, Xavier Clairardin,
Winston Way, Shashi Patel, Martin Carroll, Ralf-Peter Braun, Paul Kolesar,
Itsuro Morita
Chris
Cole's Presentation
==================
Moved through pg 1 and 2 readily, page three also discussed 25G(4 channel)
Peta r: Are you doing this in tandem with some work going on in the PCS,
or is this a module-side perspective?
Chris: System guys looking at MAC architectures, 1st gen MACs likely will be
10G and 20GCDR is going to be pushing technology
Note: We need concensus on the PCS lane width as this may help direct optic
widths.
12x10G links (8G links with 8B10B coding) as an example versus 10x10.3
Petar is indicating that offering 12 channels would render parallel optic
solutions and WDM solutions with a common channel width
John Jaeger - Proposing x12 for WDM fiber?
Schelto/Petar - Latency is important to consider. 8B10B would provide lower
latency.
Chris: 4 Channel necessary?
Paul K: 4 channels have advantage for mux/demux being a binary value. But
acknowledges cost of increased data rate may not balance out.
Chris: 6/5/4 still open for 2X, 12/10 still open for 1X.
Chris: It would be nice to have 40Km solution that is leveragable from 10Km
solution..we should think about it, but 40Km is currently not an official
objective.
Chris: 12x10 should be included in our consideration for multi-fiber solutions.
Chris: Sounds like we have agreement that nobody is calling for anything other
than 2 level signaling.
Petar: Is 12 channel much harder for WDM?
Chris: For DWDM, not. For CWDM.. Could be. The price of commonality on the 12
channel between MM and SM is not readily understood as worth its value.
John J: Not interested in 12 channel WDM
Chris: Did not put up 10x10G @ 1310…does not fit in 1310 window.
Chris: Did not put 1310 in 1x technology because people are not really doing
that and would not be leveragable.
Chris: Sounds like we should add 12x10G on the electrical interface. We should
look at infiniband and see how we might leverage that.
Chris: Uncooled solutions provide substantial (40%) savings in cost.
Chris: We should add 2x56G DQPSK
Petar: Should we assume that PCS interface and PMDs will have different channel
widths?
Dan: Should we optimize the PCS interface for its ability to be leveraged on MM
fiber and then leave complexity to SM solution?
Chris: OIF offering to develop an electrical interface that can run up to 25G.
Itsuro Morita 's Presentation
=======================
DQPSK allows up to 50Km distance.
Petar: Why not measuring to 10e-12?
Itsuro: Did not use precoder, so expected error rate in receive could not be
measured. (not sure I captured this correctly)
Dan: RZ Carving?
Itsuro: For long distance transmission, RZ carving is additional modulation
stage driven by clock.
Chris: Is proposal for 10Km 1310 DQPSK?
Itsuro: Yes, if it can be applied to 1310, it would be good solution. Not sure
if its doable yet. Needs further study.
Chris: Don't believe DCF is practical.
Petar: If you use DCF, it would require tailoring of DCF to length… is
this the recommendation?
Itsuro: For 10Km, with fixed DCF may be possible. Needs study.
Chris: Are you going to study the 1310nm/10Km alternative?
Itsuro: Need to survey availability of technology to see if it can be
done/shared.
Chris: Can you share which components are used?
Petar: Why 108 bit delay.
Petar: Modules? Should we try to force
them into the same form factor?
Dan: IEEE does not deal with implementations, but architectures.
Chris: Could we have 12 *and* 10 lane interfaces defined at MAC/PHY boundary?
Dan: To paraphrase; Can we have two PCSs and because they are highly digital,
embed them in the MAC/PCS chip and thereby provide a common differential
interface for either PCS with different lane counts? -- Seems possible
Larry: Meeting schedule for Monterrey?
Dan: Dunno. Please check the IEEE website. We will meet within the HSSG and not
as a separate breakout.
Dan: Please keep an open perspective on how to solve the MAC/PCS interface
solution when looking at PMD solutions with the desire that we come up with
something that works best for all cases.
If there any modifications required to
these minutes, please send me an email with specific recommendations for
change.
Monday Dec 18th at 10am
is our next meeting
I will send out a notice with specifics of
the call soon.
Best Regards,
Dan Dove
HSSG-FO Chair
--
___________________________
Marcus Duelk
Bell Labs / Alcatel-Lucent
Crawford Hill HOH R-237
791 Holmdel-Keyport Road
Holmdel, NJ 07733, USA
fon +1 (732) 888-7086
fax +1 (732) 888-7074