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Hi Ze'ev;
Answers/Comments below...
-----Original
Message-----
From: Ze'ev Roth [mailto:zeevr@mysticom.com]
Sent: Tuesday,
February 04, 2003 9:36 AM
To: 'DOVE,DANIEL J (HP-Roseville,ex1)'; 10GBASE-CX4
(E-mail)
Subject: RE: [10GBASE-CX4] Signal Detect - Proposed Text &
Figures
Hi Dan,
A few
points I'd like to clarify.
1. Missing
definitions
-On 15m IB cable, the
signal will be sometimes well below 125mvpp
(instantaneously) hence there
should be a low pass definition, in terms of
poles/zeroes or multipliers. My
understanding is that the figure describes
the signal envelope rather than
the signal itself -so one way to
implement it is using an envelope
detector.
- There should be some
tolerance given for the analog voltages -
analog designers may have a fit
with this definition.
The spec indicates that once the input voltage has exceeded VSDA, it
must
drop below VSDD for longer than a minimum amount of time. This is in
essence
a mixed signal peak-detector function. Imagine two comparators, one
with a
positive offset of (VSDA+VSDD)/2 and another with a negative offset of
the
same amount. When either comparator triggers, two things happen.
First,
Signal_Detect is asserted. Second, a counter is reset and starts
to
count down. When that counter expires, Signal detect is lost. If you
have
IDLE occurring at intervals during those few uSeconds (you will), there
will
be instances where the voltage exceeds your threshold, the counter
is reset,
and Signal_Detect remains asserted.
2. Questions
Supposing that
there is a CX4 signal at 50mvp2p envelope and the
receiver correctly decodes
it
(but it doesn't pass the
proposed signal detect) - whould you want
the receiver to disregard its input
?
Only if SIGNAL_DETECT=FAIL. If, during the last 100uS, the voltage
had
already exceeded SDAT, then the CX4 signal should be passed through.
If
during the last 250us-500us, the signal voltage remained below VSDD,
it
should be ignored.
-The
IEEE XAUI standard does not define / use the signal detect
function - why
should CX4 have it?
XAUI is an internal
interface. You don't typically have cables that are
connected, dis-connected.
From a system standpoint, I know when a blade is
inserted into a chassis by
other means. I have no way to tell if a cable
has been connected, whether the
other end of the cable is attached, whether
that box is powered up, or
sending proper signals.
- You can add the comparators
either directly to the input therby
increasing
the input capacitance and degrading
performance,
or they can be added
after the equalizer which probably will have a
gain and cause alot of headache to the
designers.
As a result, not
all XAUI chips will be CX4 compatible and will
require
It is not an objective of the group to
make all XAUI chips compatible with
CX4. It is an objective to leverage the
XAUI work. As for input capacitance,
I would recommend putting some
resistance in series with the comparator
input to isolate the
capacitance.
3. Is the proposed Signal Detector really needed
?
-The XAUI standard provides
couple of data validity guard
bands:
-PCS SYNC machine checks for a
certain pattern
-Alignment machine checks for
Alignment validity
-PCS layer checks validity of framing
and XAUI protocol
-PCS produces IDLES as long as there
is not a valid XAUI
frame
These can be combined to
yield an alternative "logical"
signal
detect.
In this case we'll need to
define in the conformance tests a
proceedure
for ensuring that the receiver sensitivity is
sufficient.
Signal_Detect is very useful in box-box
interconnects to isolate
problems down to the "Is everything properly
attached?" state. Also
I believe that testing the proposed spec will be
pretty straightforward
as I can measure the voltage on the wire and evaluate
the status of the
SIGNAL_DETECT function via MDI registers.
I hope I have responded adequately to your
concerns.
Regards,
Dan