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Re: [802.3_DWDM] Clause 153.3.2.2.2 DQPSK encode



Hi John,

For anything built to the standard, the mapping has to be arbitrary and the Rx has to be able to tolerate arrival of any lane on any polarization or phase.

Firstly, you stripe the OTU4 frame into 20 lanes, and then you bit-mux (arbitrarily) groups of 5 of those lanes onto 25G lanes. So each lane modulated on I or Q of a polarization is already an arbitrary group of five 5G lanes with skew between them, and you need to do a 1:5 bit disinterleave of what comes over one of those before you can even hunt for the FAS.

How could which of these lanes you put on which phase or polarization of the signal possibly matter?

Regards,

Steve

 

From: John DeAndrea <John.DeAndrea@xxxxxxxxxxx>
Sent: Tuesday, February 25, 2020 3:51 PM
To: STDS-802-3-DWDM@xxxxxxxxxxxxxxxxx
Subject: [802.3_DWDM] Clause 153.3.2.2.2 DQPSK encode

 

Before I comment on this, “The selection of the two lanes of the four-lane interface is used to form each stream of DQPSK symbols is arbitrary”

 

Have multiple DSP implementations shown that an arbitrary startup and selection of the lanes, mapped to the 2 polarizations, can be decoded correctly based on the lane interleave function  described in 153.3.2.2.1?  I think there were some lane issues in the plugfest that occurred last year, and it was not clear if this is ddefined sufficiently.

 

Any comment welcome.

 

John


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