The Enhanced Tx/T2 Proposal for 1000BASE-T Sailesh K. Rao Level One Communications, Inc. Ph: (908)-972-0707 x11 e-mail: sailesh@level1.com IEEE 802.3 GTF, Newark, NJ December 17-18, 1996. 1. Main Topics - Anatomy of a 1000BASE-T Transmitter - Why NRZ Pulse Shaping? - Why 5-level Encoding? - Some Details of the Enhanced Tx/T2 Proposal - PCS Transmit - 9B-4P Symbol Encoding - Simulation Results - Charting a Solution for 1000BASE-T 2. Anatomy of a 1000BASE-T Transmitter 3. ANY 1000BASE-T Transmitter - 125MHz 8-bit GMII Input - XMHz, Y-Level encoding - Pulse-Shaping on 4-pairs - Questions for us to Answer: - What should the symbol encoder/symbol rate be? - What should the pulse-shaping be? 4. Option A- The Enhanced Tx/T2 Proposal - X = 125MHz, same as GMII - Y = 5Levels, same as 100BASE-T2 - NRZ Pulse shaping spans ONE symbol and requires just 125MHz ADCs and DACs. 5. Option B- CAP/QAM-5X5 - X = 125MHz, same as GMII - Y = 5Levels, same as 100BASE-T2 - Uses Two Hilbert-pair Pulse shaping transmit filters alternately. - Requires 187.5MHz ADCs and DACs. - Pulse shaping generally spans 20symbols. 6. Option C- CAP/QAM-3X3 - X = 166.67MHz, NOT same as GMII - Y = 3Levels - Uses Two Hilbert-pair Pulse shaping transmit filters alternately. - Requires 250.0MHz ADCs and DACs. - Pulse shaping generally spans 20symbols. 7. Option D- CAP/QAM-6X6 - X = 100.0MHz, NOT same as GMII - Y = 6Levels - Uses Two Hilbert-pair Pulse shaping transmit filters alternately. - Requires 150.0MHz ADCs and DACs. - Pulse shaping generally spans 20symbols. 8. Why Option A? - It is rooted in 802.3 Clauses - 5-level symbol encoding can be literally stolen from 100BASE-T2, Clause 32. - Same cabling, same symbol rate, same pulse shaping as 100BASE-Tx. Relevant specs can be reused from Clause 24, ANSI TP-PMD. - NRZ Pulse shaping used in 10BASE-T after Manchester Encoding, 100BASE-Tx after MLT-3 encoding - Minimum latency pulse shaping for bit-budget conscious CSMA/CD. - Simple low-latency receivers possible. Sophisticated, Complex, fractionally-spaced receivers possible too! - Excellent emissions/susceptibility tradeoff. - Obvious choice, provided it works well enough. 9. Option A - +9dB margin without Trellis Coding and Cancellers to Burn 10. Option A - +12dB margin with Trellis Coding and Cancellers to Burn 11. Why NRZ Pulse Shaping? 12. Reasons to Do It. - Simple. - Same as before. - Minimizes latency in both transmitter and receiver. - maximizes number of useable stages in Viterbi Decoder at receiver, if needed. - Much better emissions/susceptibility tradeoff than CAP/QAM. - Much better A/D dynamic range utilization than CAP/QAM. 13. Reasons Not to Do It. - Baseline Wander - But, need to deal with baseline wander for 100BASE-Tx in 100/1000 implementations. 14. Susceptibility Facts - 1V ptp NRZ pulse shaping has better susceptibility than 2.3V ptp CAP3X3. - CAP with 20% excess bandwidth square-root raised cosine pulse shaping has a peak-to-average ratio of 2.3 - fractionally spaced equalizers tend to reduce noise margin by upto a factor of 2 compared to symbol equalizers. - 1V ptp Tx/T2 and 1V ptp CAP3X3 have roughly the same margin for emissions with respect to 100BASE-Tx. - Therefore 1V ptp Tx/T2 has much better emissions/susceptibility tradeoff than CAP3X3. 15. Why NRZ Pulse Shaping? - It is simple. - Good Emissions/susceptibility tradeoff. - Good SNR margin with symbol spaced equalizers. - Minimizes transmitter/receiver latency - maximizes number of useable stages in Viterbi Decoder at receiver, if needed. - Better A/D dynamic range utilization than CAP/QAM. - It works well in 10BASE-T, 100BASE-Tx. - Enhanced Tx/T2 uses the same cabling, the same symbol rate, the same pulse shaping as 100BASE-Tx. It requires less SNR than 100BASE-Tx. Therefore, it will work well for 1000BASE-T. - Does alternative have substantially better properties on ANY of the above?? 16. Why 5-level Encoding? 17. 5-level Encoding - Used in 100BASE-T2, Clause 32 of 802.3 standard. - 4-levels represent data. Extra level (ESC) used to transmit Start Stream Delimiter, End Stream Delimiter, Transmit Error, Idle/Data recognition etc. - Allowed symbol rate to be the same as MII clock rate in 100BASE-T2. - Allows symbol rate to be the same as GMII clock rate in 1000BASE-T. - Provides Trellis Coding and extra 5.2dB margin! 18. Properties of 100BASE-T2 5-level Encoding - Automatic Polarity Correction during idle. - Automatic pair swap correction during idle. - Automatic differential delay compensation during idle. - Ease of descrambler state recovery. - Guaranteed non-zero symbol once every two symbols during idle. - Instant (two-symbol) recognition of idle. - Instant (two-symbol) recognition of link partner's receiver status during idle. - Packet delimiters are better protected codes than normal data. 19. Principles of 100BASE-T2 5-level Encoding - All random bits needed are generated from one scrambler that is advanced one bit per symbol. - Partition 5-levels into two subsets: - X = {-1, +1} - Y = {-2, 0, +2[=ESC]} - Random sign inversion to remove DC disparity - Sense of sign inversion is reversed between data/idle. Thus, -2 during data is ESC during idle and vice-versa. - During idle, the only combinations allowed on Pairs A,B are: - XY on Pairs A,B - transmitted when scrambler bit is 1. - YX on Pairs A,B - transmitted when scrambler bit is 0. - Continuosly conveys pair identity, scrambler state, pair alignment to link partner - Odd Y symbol is inverse of previous even one. Guarantees that -2 is sent once every two symbols to ensure idle/data recognition. 20. Overview of Enhanced Tx/T2 proposal - "Dualized" 100BASE-T2 PCS - Use redundancy to do parity encoding - 100BASE-Tx PMA - Simple reuse of existing 100BASE-T standards to achieve 1000BASE-T! 21. Enhanced Tx/T2 Subset Mapping - A 1-D View - Subset D0 is {XYXY OR YXYX} on pairs A,B,C,D. - Subset D1 is {XYYY OR YXXX} on pairs A,B,C,D. - Subset D2 is {XYYX OR YXXY} on pairs A,B,C,D. - Subset D3 is {XYXX OR YXYY} on pairs A,B,C,D. - Subset D4 is {XXXX OR YYYY} on pairs A,B,C,D. - Subset D5 is {XXYX OR YYXY} on pairs A,B,C,D. - Subset D6 is {XXYY OR YYXX} on pairs A,B,C,D. - Subset D7 is {XXXY OR YYYX} on pairs A,B,C,D. 22. Idle Encoding - In 100BASE-T2, the idle codes are XY and YX. - In 1000BASE-T, we can use D0 for idle codes. - XYXY is sent if scrambler bit is 0. - YXYX is sent if scrambler bit is 1. - Ensures that in trellis coded version of 1000BASE-T, the parity encoder is in state 0 during idle. - Compatible with 100BASE-T2. - Guarantee that a dual-ESC code is sent once every two symbols during idle to distinguish idle from data. 23. Symbol Mapping - An Algorithmic View - 2LSBs + parity bit is used to select one of 8 subsets, Di. - 6MSBs (B7-B2) are used to select a point within subset as follows: - B7=0: Use Normal Data Code - B6=0: Use X-primary code - B6=1: Use Y-primary code - B5,B4,B3,B2 - select -1(X),-2(Y) or +1(X),0(Y) on pairs A,B,C,D respectively. - B7=1: Use Single ESC Data Code - B6,B5: Used to select position of +2[ESC] symbol (on which pair?) - B4,B3,B2 - select -1(X),-2(Y) or +1(X),0(Y) on non-ESC pairs. 24. Receiver Slicing Approach - On each pair, - Slice to X point with error Ex. - Slice to Y point with error Ey. - Without trellis coding, - Valid code must have an even number of X points. - Reverse mapping algorithm to read off the bits. - With trellis coding, - find nearest code point within each subset using XY pattern of subset - use as distance metric in Viterbi decoder - reverse algorithm to get inverse mapping from valid code to bits. 25. Packetized Trellis Codes - Idle encoding uses only D0 points - Data encoding uses all points - At end of frame, use two symbols to restore parity encoder states to 000 prior to sending ESD symbols. - Use current states of parity encoder as subset-selection bits and pick an invalid multiple-ESC code within that subset, for two cycles. - Ensures that at end of packet, Viterbi Decoder has prior knowledge of final state and can read off the residual symbols without SNR penalty. 26. Simulation Environment - Bob Campbell's Insertion Loss Curve - Echo Return Loss Curves from DEC and Bob Campbell. - NEXT Loss Curves from Bob Campbell - Dual 100KHz transformers with single-pole HPF model. - 80MHz 5th order Butterworth receive anti-aliasing filter. - 16X Oversampling for analog signal calculations. - 3.0ns rise and fall times on NRZ pulse. 27. Receiver Parameters - 7-bit 125MHz ideal ADC - 10-tap 125MHz symbol spaced feedforward equalizer - 20-tap feedback equalizer - 150-tap Echo/NEXT cancellers 28. Simulated Margins - SIMULATION 1: No self-NEXT, no Echo - Margin = +13dB with Viterbi Decoder - Margin = +10dB without Viterbi Decoder - SIMULATION 2: DEC Echo, BRC NEXTs - Margin = +11dB with Viterbi Decoder - Margin = +8dB without Viterbi Decoder - SIMULATION 3: BRC Echo, BRC NEXTs - Margin = +12dB with Viterbi Decoder - Margin = +9dB without Viterbi Decoder - SIMULATION 4: BRC Echo, BRC NEXTs, T/2 Fractionally Spaced Equalization - Margin = +13dB with Viterbi Decoder - Margin = +10dB without Viterbi Decoder 29. Crane's Noise Immunity Test Results - Worst-case Noise Immunity is 90mV ptp for 1V ptp launch level, assuming worst-case echo/NEXT conditions. 30. Receiver Jitter Tolerance Test - Test with Uniform random jitter on ideal sample clock. - In the absence of echo/NEXT on a 100m cable, can tolerate 3.0ns ptp uniform clock jitter and still achieve 10^-10 error rate. - With BRC echo/NEXT on a 100m cable, can tolerate 1.6ns ptp uniform clock jitter and still achieve 10^-10 error rate. - With DEC echo/BRC NEXTs on a 100m cable, can tolerate 2.2ns ptp uniform clock jitter and still achieve 10^-10 error rate. 31. Charting a Solution for 1000BASE-T - Two main questions to answer: - Which pulse shaping to be used? - NRZ? - Our Choice - CAP? - QAM? - How many levels? - 3 at 166.67MHz? - 5 at 125MHz? - Our Choice - 6 at 100MHz?