I checked the simulations.
With the reference taken as when the system goes into a
current limiting mode, at least Class 8 and Class 4 flip from OK
to failing the transient requirement (with a 360uF and 180uF cap
respectively).
Other Classes may also be affected, I didn't check.
While I also am glad to see the "intrinsically OK" text gone,
it should be our goal to make it such that PDs with capacitors
of 180uF and 360uF do not need special provision to deal with
transients.
That is after all the basis on which TLIM and ILIM have been
chosen.
Given that there is no interoperability issue with the
reference taken when the voltage transient is complete, I fail
to see why we should increase the burden on the PD ?
Hi Lennart,
The TR1,2 are steps with a rise-time, however they are also
described as having a current limit. If the source current
limiting kicks in, then the end of the transient doesn't occur
until the limiting ceases. The easiest reference is the
beginning of the transient because there are no ambiguities.
I think this was the intent early-on, however as you point
out, the rules aren't clear, and neither are the origins (at
least in a quick search). The existing text doesn't
explicitly reference the beginning:
During a transient the
input power of the PD may exceed PPeak_PD or
PPeak_PD-2P. Table 145–30 defines
three PSE output voltage transients.
When transient TR1 or TR2 is
applied, the PD shall meet the
operating power limits after TTransient as
defined in Table 145.
However If the intent was to reference the end of the
transient, I would think the second sentence would have been:
AFTER transient TR1 or TR2 is
applied, the PD shall meet the operating
power limits after TTransient as
defined in Table 145.
In any case, the TR1,2 test requirements are an extreme
corner case and there's no longer any suggestion to the reader
that specific capacitances will "intrinsically" pass, so I
don't see a problem with the reference being at the
beginning.
Best Regards,
Ken
On 11/1/2017 8:29 AM, Lennart
Yseboodt wrote:
Hi Ken,
The PD not spending more than 6ms or 10ms in the
current-controlled mode is also something the PD should
meet.
We currently do not have a requirement for this (ie. it
is possible to meet TR1/TR2 but spend more than TLIM in the
input current mode).
Note that all Class/Type combinations currently do not
violate TLIM.
The current text does not offer a reference for
Ttransient. I picked the end of the source transient because
it is an easy to find point.
If we shift the reference point backward in time, the PD
margin decreases and we may have to increase ILIM to TLIM to
make things work again.
- Should we add a requirement to the TR1 and TR2 that the
PD may not be current limited to ILIM for more than TLIM ?
- Given that currently there is no issue with TLIM, do
you still feel we should move the reference point back ?
Kind regards,
Lennart
On Mon, 2017-10-30 at 09:39 -0400, Ken wrote:
Hi Lennart,
The new text: "referenced from when the ‘final voltage’ is reached at
the source", sets a time boundary which is after the time that the PD
starts to violate Ppeak_PD. Seems like it should start at the beginning
of the transient, so that the PD Peak excursions that are beyond
Ppeak_PD are no wider than 10ms and 6ms, to match Tlim_min in the PSE
section.
Best Regards,
Ken
On 10/29/2017 10:09 AM, Lennart Yseboodt wrote:
Hi folks,
Attached proposed baseline for the PD transients section.
At the September meeting it became obvious that Table 145-30 wasn't
terribly clear.
I've re-simulated all of the transient conditions and, except for
Class 7, everything is OK.
We may want to consider increasing the ILIM for Class 3, Class 4, and
Class 8 to make it such that PD's that "intrinsically" should be fine
actually are.
See simulation_annot.pdf for simulation results.
Kind regards,
Lennart