Yuri,
Many of these questions were asked and answered during the Q&A following my presentation, for those that were not you will see my responses below:
Question 8
Are you aware of other reports on low-loss and passive (no tuning power required) WDM filters demonstrated in a number of non-Luxtera Si Photonics technologies?
·
I am aware that there have been many presentations and publications of research into such Si Photonics WDM filters have been made, which typically
report a single device tested in a laboratory environment.
Question 9
For example, are you aware of several presentations presented in the past at this IEEE 802.3bm as well as in the 100G Study Group meetings on WDM filters based on non-Luxtera Si Photonics technologies that have less than 3dB insertion loss:
pages 9 and 10 in
gill_01b_1112_optx.pdf
page 12 in
vlasov_01a_1112_optx.pdf
page 6 in
martin_01_0712_optx.pdf
page 4 in
vlasov_01_0312_NG100GOPTX.pdf ?
Question 10
Are you aware that of these WDM devices listed in Q9 (in addition to many other silicon photonics WDM demonstrations currently in the public domain) NONE are relying on active thermal tuning of the WDM components phase and hence do not contribute to the total
dissipated power as it is demonstrated, for example, on page 10 of
gill_01b_1112_optx.pdf ?
·
Question 9&10 appear to be the same. These reference several different presentations, none of which seem directly applicable to the CWDM proposal
you are putting forward. In gill_01b_1112_optx.pdf you show the following:
·
·
This appears to show a 3dB bandwidth of about 5nm, for a fixed temperature.
·
It also appears to show an effective 3dB bandwidth (composite of +/- 30 lines) of about 0.8 nm for 60 C ( or is it 30 C) of temperature variation.
·
It says that if it is not temperature stabilized it can provide operation from 30C to 60C? What happens above 60C / below 30C? Does this mean that
to mean to achieve a meaningful temperature range of 70 C (min) it would need temperature stabilization? How would that be achieved? Would that have additional loss/power consumption?
·
This looks like a single device? How does this look if you were to produce in high volume? How does it vary within normal CMOS fabrication tolerances?
Question 11
Are you aware that all of these measured results listed in Q9 are obtained on chips fabricated on a high-volume non-Luxtera Si Photonics technology platforms in Kotura or IBM?
·
So the part referenced in gill_01b_1112_optx.pdf was done in high volume? If not then another IBM device? What constitutes high volume in this case?
Are these just discrete devices or are they integrated into a full system?
Question 12
Do you agree that the necessity to burn a total of 1.8W of power for tuning of WDM components as suggested in page 4 is not a generic problem with all Si Photonics technologies, but rather, perhaps, a problem with one of Luxtera’s Si Photonics technologies?
Which one?
·
I don’t know what you mean by ‘all Si Photonics technologies’, but I’m assuming you are referring to any existing or potential photonic technology
built using conventional CMOS foundries. If so then inherent in any component design is the requirement to handle the process variability that comes with said foundaries, and thermal variability of the environment into which they are employed.
Question 13
Does the “PSM4”, “CWDM” and “LR4” on the top of each column have any relation to corresponding baseline proposals as it was presented at the latest meetings of 802.3bm (anderson_01a_0313_optx.pdf and
vlasov_01a_0313_optx.pdf,)?
·
As this presentation was done before the new CWDM baseline was presented, certain assumptions had to be made. The prior CWDM baseline (from January)
only anticipated 2.3 dB of channel insertion loss, but as Paul Kolesars presentation showed this is insufficient for a duplex link. I used his numbers for the loss budgeting.
·
Given that the cost comparisons and market presentations for CWDM always present its use up to 2km carrier Ethernet, I thought it prudent to call
out that additional penalty separately. If your baseline proposal (which I was encouraged to see revised up to a 4dB loss budget) does not support that reach, then I submit the cost/market comparisons should only be done up to the reach that it does support.
Question 14
The usual approach to calculate the optical power link budget that 802.3 has followed for many years is to calculate the channel insertion loss between TP2 and TP3 and add the TDP penalty. For all IEEE standards this link budget does not include insertion loss
of the transmitter or receiver. These latter numbers are left for vendors to resolve and are not a part of any standard.
If the Q13 answer is “yes” then do you agree that the link budget calculations should follow the usual definition as channel insertion loss plus TDP penalty for 500m channel reach as presented for all PMD baseline proposals so far?
·
As far as I know there is no formal methodology for doing link budget comparisons across different prospective solutions. To get a fair comparison
it is necessary to take a full accounting of all the difference between the two proposals, which in this case include (at the very least):
o
Addition of 3 extra wavelengths for CWDM
o
Addition of optical mux for CWDM
o
Addition of optical demux for CWDM
o
Additional fiber plant losses for CWDM due to optical cassettes
o
Additional link budget penalties for CWDM due to non FEC operation.
Question 15
If the answer to Q13 is “yes” and the “CWDM” column represent an attempt to build a channel insertion loss budget based on the 100GBASE-CWDM baseline proposal (vlasov_01_0113_optx
or vlasov_01a_0313_optx) , why 2km option is used on line 4 with additional 0.75dB insertion loss, while the objective of both the 802.3bm TF and the baseline CWDM proposal is
the reach up to 500m?
·
As I mentioned above, the excess reach to go from 500m to 2km was called out separately. However for the cost/market comparisons for carrier Ethernet
uses up to 2km to be valid/applicable it seems necessary that the technical requirements of 2km reach be elucidated.
Question 22
What the source of the information that non-Luxtera Si Photonics technologies using edge coupling are having a problem of “prohibiting chip on board cost reductions”.?
·
The statement is that it ‘may’ prohibit chip on board integration, due to the fact that the cross sectional on an IC is quite thin and there is little
clearance (less than 1mm) from the mode location to the PCB beneath the IC in which to fit a coupler.
Question 23
What the source of this information that non-Luxtera Si Photonics technologies that are using edge coupling are having to rely on “polarization maintaining fiber”?
·
That statement wasn’t made. The statement was that polarization diversity needed to be accommodated on the receiver.
·
Vlasov_01_0313_optx make a similar comment on page 12, where it said “Note: -6.3 dBm receiver sensivity allows to accommodate up to 7dB insertion
loss shared between input fiber coupler, polarization management and WDM demux.”
Question 27
If the answer to Q1 is “No” then the statements in this comparison implies generalization of problems specific to Luxtera technologies to all other non-Luxtera Si Photonics technologies. In this case I would ask which non-Luxtera technology is used for this
comparison and what the source of this information is. I would also suggest to take into account three independent relative cost analysis studies presented in
martin_02_0912_optx.pdf,
shen_01a_0313_smf and in
vlasov_01a_1112_optx.
·
Neither of the CWDM ‘cost’ analysis actually show how a finished module is integrated, or the methodology used to make cost derivations. The closest
there is to a block diagram is on page 15 of vlasov_01a_1112_optx.
·
Shen_01a_0313_smf actually references a Luxtera parallel single mode solution on page 29 when it says COB has been proven.
Thanks,
Brian Welch
From: Yurii Vlasov [mailto:yvlasov@xxxxxxxxxx]
Sent: Thursday, March 21, 2013 3:11 PM
To: STDS-802-3-100GNGOPTX@xxxxxxxxxxxxxxxxx
Subject: [802.3_100GNGOPTX] questions remained unanswered at the Q&A session at 802,3bm Plenary after the presentation of welch_01_0313_optx
Dear all,
As a follow-up on yesterday’s discussion I am summarizing here questions to the presentation
http://www.ieee802.org/3/bm/public/mar13/welch_01_0313_optx.pdf
Some of the questions I was able to ask during the Q&A time, while some of them were left unanswered or even not asked due to request of the Chair to move the rest of the discussion offline. Following Chair’s suggestion I am writing down all the questions I
was planning to ask here in the Reflector. I do believe that it is important for people on the floor to get an unbiased view on advantages and disadvantages of various proposals as well as on technologies behind them to cast a balanced educated vote.
The answer on the first question is crucial. I would have had no further questions if the answer would have been “Yes”. However the answer was “No”. Correspondingly I feel obligated to present here all the questions numbered consecutively with the page number
in the presentation listed for the reference.
Page 1
Question 1
Do you agree or do you not, “yes” or “no” would suffice, that “Si Photonics” in the title of your presentation means “Luxtera Si Photonics technology” and, correspondingly, the numbers and statements presented are related to advantages and disadvantages that
Luxtera technology has in trying to reach performance required by different baseline proposals?
Page 2
Question 2
This page represents the strategy for comparative analysis of link budget, power, assembly and cost for CWDM, PSM4 and LR4. Depending on how this strategy is formulated a substantially different set of conclusions can be reached.
It is stated that for power estimate the “fully integrated silicon photonics solution using 28nm CMOS node” is being used. Does “full integration” means CMOS circuits and optical devices located side-by-side on the same silicon die?
Question 3
What is the level of maturity of this “fully integrated silicon photonics 28nm CMOS technology” – a) is it in development, b) is it fully qualified or, by any chance, c) does Luxtera already have transceiver (not AOC) products shipped today in volumes with
this technology node?
Question 4
In this page you mention “existing silicon photonics technologies”. Which existing silicon photonics technologies are you considering: a) Luxtera technology exercised in 130nm node at Freescale, b) Luxtera 28nm technology mentioned above, c) any other Luxtera
technology not mentioned or d) Si Photonics technologies of other companies?
Question 5
If the answer to Q4 is “all of the above”, what are the sources of your information and what is the approach you are using in assessing the non-Luxtera Si Photonics technologies?
Page 4
Question 6
Which technology version of Luxtera Si Photonics technology the performance numbers of WDM mux and Demux correspond to – a) the 130nm Freescale or b) “fully integrated silicon photonics 28nm CMOS node”?
Question 7
How different is the interleaver presented on the right bottom corner of this page from the one reported in T.Pinquet et al, Proc. of SPIE Vol. 6898, 689805, (2008) with 2.6dB insertion loss?
Question 8
Are you aware of other reports on low-loss and passive (no tuning power required) WDM filters demonstrated in a number of non-Luxtera Si Photonics technologies?
Question 9
For example, are you aware of several presentations presented in the past at this IEEE 802.3bm as well as in the 100G Study Group meetings on WDM filters based on non-Luxtera Si Photonics technologies that have less than 3dB insertion loss:
pages 9 and 10 in
gill_01b_1112_optx.pdf
page 12 in
vlasov_01a_1112_optx.pdf
page 6 in
martin_01_0712_optx.pdf
page 4 in
vlasov_01_0312_NG100GOPTX.pdf ?
Question 10
Are you aware that of these WDM devices listed in Q9 (in addition to many other silicon photonics WDM demonstrations currently in the public domain) NONE are relying on active thermal tuning of the WDM components phase and hence do not contribute to the total
dissipated power as it is demonstrated, for example, on page 10 of
gill_01b_1112_optx.pdf ?
Question 11
Are you aware that all of these measured results listed in Q9 are obtained on chips fabricated on a high-volume non-Luxtera Si Photonics technology platforms in Kotura or IBM?
Question 12
Do you agree that the necessity to burn a total of 1.8W of power for tuning of WDM components as suggested in page 4 is not a generic problem with all Si Photonics technologies, but rather, perhaps, a problem with one of Luxtera’s Si Photonics technologies?
Which one?
Page 5
Question 13
Does the “PSM4”, “CWDM” and “LR4” on the top of each column have any relation to corresponding baseline proposals as it was presented at the latest meetings of 802.3bm (anderson_01a_0313_optx.pdf and
vlasov_01a_0313_optx.pdf,)?
Question 14
The usual approach to calculate the optical power link budget that 802.3 has followed for many years is to calculate the channel insertion loss between TP2 and TP3 and add the TDP penalty. For all IEEE standards this link budget does not include insertion loss
of the transmitter or receiver. These latter numbers are left for vendors to resolve and are not a part of any standard.
If the Q13 answer is “yes” then do you agree that the link budget calculations should follow the usual definition as channel insertion loss plus TDP penalty for 500m channel reach as presented for all PMD baseline proposals so far?
Question 15
If the answer to Q13 is “yes” and the “CWDM” column represent an attempt to build a channel insertion loss budget based on the 100GBASE-CWDM baseline proposal (vlasov_01_0113_optx
or vlasov_01a_0313_optx) , why 2km option is used on line 4 with additional 0.75dB insertion loss, while the objective of both the 802.3bm TF and the baseline CWDM proposal is
the reach up to 500m?
Question 16
If the answer to Q13 is “no” this means that columns “CWDM” does not refer to a specific baseline proposal. It is possible then to assume that the table represents an attempt to fold module insertion loss into the link budget and compare to other solutions.
In this case, if the answer to Q4 is “all of the above” and the answer to Q9 is “Yes” then why additional 3dB+3dB=6dB insertion loss due to MUX and DMUX is included for “CWDM” column since it is a problem specific only to one or all of Luxtera technologies
in yielding low loss WDM, and this generalization is not applicable to all possible non-Luxtera Si Photonics technologies?
Page 6
Question 17
If the answer to Q13 is “yes” and columns “PSM4” and “CWDM” correspond to PSM4 and CWDM baseline proposals as presented in
anderson_01a_0313_optx.pdf and
vlasov_01a_0313_optx.pdf, correspondingly, then the bottom line of the table representing “per baseline proposal (aggregate)” corresponds to maximum channel insertion loss. Correspondingly,
for the baseline PSM4 this should be 3.26dB and for the baseline CWDM should be 4dB. Correspondingly, the difference in channel insertion loss between PSM4 and CWDM baseline proposals should be 0.74dB, not 7dB. With maximum TDP budgeted differently (for baseline
PSM4 as 3.8dB and for baseline CWDM as 2.2dB) the total power link budget for maximum TDP is actually 7.06dB for PSM4 and 6.2dB for CWDM. Do you agree?
Page 8
Question 18
If the answer to Q1 is “Yes” there are no comments related to pages 8, 9, 10, and 11 since it solely represents numbers for Luxtera “fully integrated silicon photonics solution using 28nm (or better) CMOS node.” The maturity level of this technology is already
answered in Q3. If the answer to Q1 is “No” – then there is a question: Which version of non-Luxtera Si Photonics technology (and from which company) is used to fill out the columns “CWDM” and “LR4” in pages 8, 9, 10, and 11?
Page 12
Question 19
There is a subnote “Achilles heel of CWDM”. Which non-Luxtera Si Photonics technologies are having these problems?
Page 13
Question 20
Which non-Luxtera Si Photonics technologies are having these problems?
For example edge coupling technologies are, in fact, widely used for edge emitting lasers iii-V PICs, etc. for many decades. Some of non-Luxtera Si-Photonics technologies successfully using edge coupling for volume products, like for example VOA and other components
from Kotura. It is, actually, vertical grating couplers that Luxtera technology is using that is a relatively new and to my knowledge unique approach for coupling light in and out of the PIC.
In general, it is possible to imagine that non-Luxtera Si Photonics technologies utilizing edge coupling might not necessarily suffer from violation of CMOS design rules, do not require CMOS post-processing (precision dice/polish), can enable easy fiber attach,
and do not require large area for bonding to CMOS.
Question 21
If Luxtera Si Photonics technologies are being used for comparison it would be good to know which version of the technology a) 130nm Freescale or b) “fully integrated silicon photonics solution using 28nm (or better) CMOS node” is being considered?
If it is a) then indeed millions of parts were shipped and edge coupling was not in production and is only theoretically known. If it is b) then it is necessary to refer to the answer to Q3 and apply it here with respect to the statement “millions of grating
couplers already shipped”.
Question 22
What the source of the information that non-Luxtera Si Photonics technologies using edge coupling are having a problem of “prohibiting chip on board cost reductions”.?
Question 23
What the source of this information that non-Luxtera Si Photonics technologies that are using edge coupling are having to rely on “polarization maintaining fiber”?
Page 14
Question 24
If the answer to Q1 is “No” and the statements on this page also include comments on non-Luxtera Si Photonics technologies, then the word “theoretically” should be removed since numerous feasibility demonstrations have been presented in the open public domain
showing monolithically integrated WDM mux, Demux, photodetectors, modulators, etc. that can be found for example in the proceedings of the OFC from 2007 to 2013. I can easily provide over 50 recent references upon request.
Page 15
Question 25
If the answer to Q1 is “No” and the statement on this page 14 “Insufficient technology maturity to reasonably project costs/yields” also includes comments on non-Luxtera Si Photonics technologies, then I would insist on rephrasing the statement to “Insufficient
information that Luxtera has on technology maturity to reasonably project costs/yields”.
Page 16
It is a critical page in the presentation as it compares module costs for various implementations.
Question 26
If the answer to Q1 is “Yes” then don’t the statements in this comparison refer to problems specific to Luxtera Si Photonics technologies, and as such this comparison illustrates that Luxtera Si Photonics technologies could not provide CWDM modules in a cost-effective
manner.
Question 27
If the answer to Q1 is “No” then the statements in this comparison implies generalization of problems specific to Luxtera technologies to all other non-Luxtera Si Photonics technologies. In this case I would ask which non-Luxtera technology is used for this
comparison and what the source of this information is. I would also suggest to take into account three independent relative cost analysis studies presented in
martin_02_0912_optx.pdf,
shen_01a_0313_smf and in
vlasov_01a_1112_optx.
Page 17
Statements on this page either refer to Luxtera Si Photonics Technologies (if the answer to Q1 is “Yes”) or (if the answer to Q1 is “No”) it is required to provide additional information as mentioned in all related questions above.
Sincerely yours
Yurii Vlasov