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Re: [802.3_B400G] Oct 2022 Series Webpage Update

Dear IEEE 802.3df Participants,

Just to add what Chris said with the loss of conventional PCB based AUI gets more like CR/KR, the need for lower loss/power that can operated with end-end FEC it will require segmenting the AUIs.
The segmentation could be, see page 5
- Classic AUI Type-I
- BiPass AUI-Type2 
- CPC (co-packaged Cu) AUI-Type3
- NPO may work with AUI Type-3 or may need AUI Type-4.

The bigger challenge with AUI classic as the bump-bump losses >25 dB may require operating at 1E-4 that would require termination of KP4 FEC, then the total latency become 2xKP4 FEC + KP4/concatenated BCH FEC.

Just a note of cautions the assumed package loss of 5.0 dB used in the table below with further investigation is optimistic even for next Gen substrate material at least on the high radix switches.


Ali Ghiasi

On Sep 23, 2022, at 4:31 PM, Chris Cole <chris@xxxxxxxxxxxxxxx> wrote:

Dear IEEE 802.3df Participants, 

I trust everyone rushed to review next week's material as soon as John announced its availability, and discovered the excellent exposition by Mr. Lusted. For those with limited time and trying to decide which presentation to read, may I kindly call your attention to:

As always, Kent is gently steering us towards wisdom, which for some of us who prefer the more direct approach, is a bit too old school. 

What's clear is that a single large loss AUI C2M is no longer sufficient and we should write multiple specifications to adequately meet the need of mushrooming applications, specifically:

  • Traditional large loss for LR backplane, CR passive DAC, and VSR front pluggable 
  • New XSR for NPO, twinax-over-PCB, active copper, and XSR front pluggable
Obviously the exact loss is TBD, however a good start for the XSR value are the shorter reach examples in last year's presentation by Sam and Nathan. 

In off-line discussions, there has been a lot of interest in XSR's potential to save power, which we will direct into a proposal for the next meeting. For those that would like to join us in contributing or reviewing, please send me an email so that we can put you on copy as we iterate a draft. 

Thank you


On Fri, Sep 23, 2022 at 1:12 PM John D'Ambrosia <jdambrosia@xxxxxxxxx> wrote:


The webpage for the Oct 2022 Series has been updated with all presentation material for next week -

The proposed PAR modification to IEEE P802.3df and the proposed IEEE P02.3dj PAR have been uploaded.

I wish to highlight the proposed PAR modification to IEEE P802.3df-  As previously noted, I was working with Mr. Law on getting the PARs entered into the MyProject system.  An issue has arisen that has not currently been resolved

For the proposed PAR modification to P802.3df, the date for Item 4.2 could not be entered as presented to the Task Force.  The date proposed to the Task Force was Nov. 2023, however, the MyProject system will not permit entry of a date earlier than Jan 2024.  Mr. Law has contacted IEEE SA Solutions Support regarding this issue.  At this time the date of Jan 2024 has been entered for Item 4.2 with the following noted entered for 8.1

      Item 4.2: The earliest date that Myproject would allow to be entered is Jan 2024. This prevented the entry of the desired date of Nov 2023. (A bug report has been submitted to IEEE SA Solutions Support. This item of the PAR will be updated to the desired date of Nov 2023 and this note deleted immediately upon a solution being provided.)

For the consideration of the Task Force - the motion to adopt this proposed PAR will be modified to allow modification of the PAR in accordance with the note above.


John DAmbrosia

Chair, IEEE P802.3df Task Force

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